High speed frequency dividers which are based on latches have been widely used, because of better performance such as high speed and wide bandwidth thereof.
For example, a high speed frequency divider, which can achieve two divided frequencies, requires two latches, such as a first latch and a second latch, wherein the first latch servers as a follow-up stage of the second latch and the second latch servers as a follow-up stage of the first stage.
However, in existing frequency dividers, when signals inputted into the control terminal are in low level, a current circuit will be formed in the latch of the frequency divider both in static working condition and in dynamic working condition. Accordingly, power consumption will be enlarged.